Board Density and Power Density Design Challenges

Two big challenges in digital system design are board density and power distribution. A general high level goal is often to pack as much functionality into as small a space as possible. This leads to PCBs that are very densely populated. The more densely populated a PCB, the harder it is to design. Two measures of density that are interesting are the number of pins per square inch of board area and the percent of the board area that is covered by components. Designs that are densely populated often lead to additional challenges of power distribution. When many components are tightly packed together, all consuming power, the amount of power consumed per unit area can become large and lead to additional design challenges. I will refer to these three statistics as pin density, board coverage, and power density. I will periodically post these statistics for designs that I am aware of. I encourage readers to also post this information as comments. My goal is to develop some knowledge about how these statistics relate to design difficulty. First some definitions.

A = board area = board width * board height (sq. in.)
pins = total number of pins for all components in the design
C_area = component area = total size of all components, both top and bottom side (sq. in.)
P = power consumption by the board (W)

pin density = pins / A (pins / sq. in.)
board coverage = C_area / A
power density = P / A (W / sq. in.)

I will use the following rating scale for design difficulty:
1 = easy
2 = little challenge
3 = average challenge
4 = very challenging
5 = almost impossible

Note that the board coverage statistic can be a little misleading since for double sided boards the actual area available for components is actually twice the board area. So in theory this statistic could be over 100%, but I doubt if it ever would be. As long as it is calculated consistently and the meaning is understood, it is okay for comparison purposes for design difficulty.

Here are some statistics from real designs. If you post your own statistics please include all of the information included here.

PCB Technology	Net Count	Pin Density (pins / sq. in.)	Board Coverage	Power Density (W / sq. in.)	Design Difficulty Rating
20 layer, through via	3979	152	84%	0.38	5
22 layer, through via	3262	103	69.9%	0.40	3
16 layer, through via	2133	153	84.3%	0.55	5
16 layer, through via	1945	147	68.6%	0.48	3
16 layer, through via	2348	167	70.6%	0.45	4

A PCB technology advance that is available to push the limits of design density is microvias. I have only dabbled a little with this technology and don't have any statistics for designs that used it. I am especially curious if anyone has any such statistics.