High Speed Digital Design and Signal Integrity Introduction

One of the frequent topics in this web log will be high speed digital design and signal integrity design. Digital signals represent 1s and 0s (binary system). In a digital world there is nothing in between. However communication of digital signals within digital systems requires the use of analog signals usually with a higher voltage representing a 1 and a lower voltage representing a 0. The complications arise when signals must switch from one state to another. In synchronous logic systems, signals may switch once every clock period. There are timing requirements for when a signal must be valid due to the operation of synchronous circuits. In general it is reasonable for the switching time to be up to 25% of the clock period and still maintain reliable operation although each interface is unique [1]. It is very common for the switching time to be about 10% of the clock period [1]. The switching time is often referred to as rise time (tr) but this term is sometimes used carelessly to refer to the shorter of the rise time (tr) and the fall time (tf). The rise time (tr) is defined as the time between the 10% and 90% of peak signal level crossings. Digital circuits are connected together through interconnections that allow the propagation of electromagnetic energy (wired connections). These interconnections act as transmission lines. The length of a transmission line can be described in terms of physical length and in terms of time. In terms of time, the length is the amount of time it takes an electromagnetic wave to propagate from one end to the other of the transmission line. The following is an equation for the time length of a transmission line:

tpd = sqrt(er) / c * d

tpd = propagation delay of transmission line (s)
d = distance (m)
c = speed of light (m/s)
er = relative dielectric constant of transmission line medium

Reflection and ringing effects of transmission lines will start to occur when tpd becomes similar to tr. When tpd is much smaller than tr, a probe positioned at any point on the transmission line will always measure about the same voltage level. As tpd becomes larger, the voltage at one end of the transmission line will be different than that at the other when measured at exactly the same instant in time. This starts to give rise to transmission line effects and the field of signal integrity grew out of the problems created by these transmission line effects.

Here is an example to illustrate why signal integrity concerns have arisen in digital systems. A trace in a printed circuit board (PCB) that connects two chips together is 6 in. long and the dielectric constant of the common PCB material, FR4, is about 4. In 1997 (start of my career) 100 MHz synchronous logic was really fast. In 2005, 1 GHz synchronous logic is pretty common.

tpd = sqrt(4) / 1.18e10 in./s * 6 in. = 1 ns.
tr_1997 = 0.1 * 1 / 100e6 = 1 ns
tr_2005 = 0.1 * 1 / 1e9 = 100 ps

In 1997, the fastest interface rise times were starting to approach tpd on a PCB giving rise to signal integrity challenges. In 2005, a common interface rise time is much lower than tpd on a PCB making signal integrity even much more important. Unfortunately, the size of PCBs has not shrunk anywhere near the same amount as the speeds have increased. Everything in electromagnetics is governed by the laws of scaling, with in general smaller equaling faster [2]. Since PCBs aren't much smaller, much more careful design is required to make them run faster, thus the field of signal integrity design has grown! That in a nutshell defines the major design challenges present thus far in my career.

[1] Bogatin, Eric. 2003. Signal Integrity - Simplified. New Jersey: Prentice Hall Professional Technical Reference.

[2] Johnson,Howard and Martin Graham. 2003. High-Speed Signal Propagation Advanced Black Magic. New Jersey: Prentice Hall Professional Technical Reference.