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February 2006
ECC Papers Published
Thursday, 23 February 2006 9:24 P GMT-06
I published and or presented the following papers and articles over the past couple of years related to my masters degree capstone project Coding and Bit-Error-Rate Test Blocks for a Serial Digital Multi-Gigabit Communication System.[1] Carney, David
Category: High Speed Digital Design
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Destruction of my Warts
Tuesday, 21 February 2006 9:24 P GMT-06
After my initial attemps with over the counter remedies such as the acid pads, freeze treatments, and even duct tape, and two visits to a primary care Dr. who both times tried freezing treatments, the warts were not going away and were spreading and
Designcon 2006 - day 4
Saturday, 11 February 2006 3:11 P GMT-06
There is only 1 Tecforum session on the final day of the conference. Here are my notes.TF-THA Embedded Capacitance and Embedded Capcitors: Overview on Modeling and ApplicationsThe first part of the forum discussed some of the aspects of embedde
Category: High Speed Digital Design
Designcon 2006 - day 3
Thursday, 9 February 2006 12:24 A GMT-06
Here are my notes from today's sessions.
10-WA1 Moving 10 Gigabit Ethernet onto UTP: Moving 10 GE into volume production
Presented by Paul Langner. 10 Gigabit ethernet has been specified for operation on cat 6a to 100 m, cat 6e to 55 m or cat
Category: High Speed Digital Design
Designcon 2006 - day 1
Monday, 6 February 2006 11:52 P GMT-06
This week is the Designcon 2006 conference which I am attending. I will post some notes from each day's activities. I arrived this year Monday afternoon missing the first tech forum and the keynote luncheon.TF-MP2 - Opening Closed Eyes: A
Category: High Speed Digital Design