The following table contains some statistics about a digital communication link that I have seen in a recent design, notably the bus length to bit period statistic that I have talked about in the past (the higher the bus length to bit period ratio, the more complex the design of the bus is).
| LVDS Link | |
| Communication Standard | Serial LVDS |
| Signaling Type | Bus LVDS |
| Communication Architecture | Serial |
| Bus Delay (ns) | 91.19 |
| Signaling Rate (Mbps) | 240 |
| Data Rate (Mbps) | 200 |
| Bit Error Rate | 1e-13 |
| Ratio of bus length to bit period | 18.24 |
| Ratio of rise time to signaling bit period | 0.18 |
| Design Difficulty | 5 |
| Comments | A prototype of the system was built since good buffer models were not available for simulation, and several elements of the transmission channel were not easily modeled. Measurements were taken on the prototype to determine maximum cable lengths, equalization requirements, and other transmission channel characteristics. |
The design difficulty ratings are described as follows:
1 - very easy (no routing rules needed, just hook it up)
2 - easy (limited routing rules based on rules of thumb and app notes)
3 - average (routing rules needed based on rules of thumb, app notes, or SI simulation)
4 - difficult (routing rules developed with extensive SI simulation and modeling)
5 - very difficult (routing rules developed with extensive SI simulation and modeling, plus a very narrow solution space or a lot of difficulty getting it to work)
This design was a challenge even though the data rate was not very high at 200 Mbps. The link was run over a long distance with non impedance controlled connectors, which made it challenging.