Slew Rate in High Speed Digital Communication Systems

Normally in high speed digital design we think in terms of rise time of signals.  A closely related parameter is slew rate, the maximum rate of change of a voltage signal with respect to time.  One commonly used rule of thumb for relating rise time of a digital signal to the maximum frequency content of that signal is:

fknee = 0.5 / Tr

Where fknee is the frequency below which about 90% of the digital signal's power resides, and Tr is the rise time or the fall time of the signal, whichever is smaller [1].  The rise time and not the slew rate defines the frequency content of the signal.  To understand why, the following thought experiment can be used.

The rise time of a sine wave of frequency Fs can be grossly approximated as one half the period.

Trs = 0.5 * (1/Fs)

The slew rate of this sine wave can be grossly approximated as:

Slew = Vpp / Trs

If you double the frequency Fs, the approximated rise time will also double.  To maintain the same slew rate, the peak to peak voltage of the sine wave must also double.  Thought about a different way, if you have a fixed slew rate buffer that you want to drive at Fs, there is a corresponding maximum Vpp that the buffer can drive at that frequency.  If you need to double the frequency, then you need to cut the peak to peak voltage in half.  If you need to double the frequency and maintain the peak to peak voltage Vpp, then you must double the slew rate.

The slew rate is still a very interesting and important parameter that describes the strength of an output driver though.  Both increases in slew rate and decreases in peak to peak signal levels have facilitated the increase in digital signaling rates.  The following table gives some example slew rates from digital signaling as well as some other applications to show where digital communication systems fit in the big picture.

Signaling Type / Application	Smaller of Rise Time or Fall Time	Vpp (V)	Slew Rate  (V / us)	Data Rate (Mbps)
3.3 V LVTTL [2]	1.5 ns	3.3	1760	100
2.5 V SSTL2 for DDR SDRAM [2]	500 ps	2.5	4000	400
HyperTransport [2]	300 ps	1.2	2400	800
Serial AT Attachment (SATA) [3]	200 ps	0.5	1500	1500
Serial Attached SCSI (SAS) [4]	102 ps	1.6	9412	3000
PCI Express [5]	100 ps	0.668	4008	2500
Xilinx Virtex 4 Rocket IO [6]	35 ps	1.2	20571	10300
Harmon Kardon AVR-7300 Stereo Receiver	1.12 us	44.7	40	NA
TI THS3201 Op Amp (the fastest I could find)	NA	NA	10500	NA
Lightning strike	1 ms	400 M	400000	NA

[1] Johnson,Howard and Martin Graham. 1993. High-Speed Digital Design A Handbook for Black Magic. New Jersey: Prentice Hall Professional Technical Reference.

[2]  Based on personal experience

[3] Based on specifications in Serial ATA: High Speed Serialized AT Attachment Revision 1.0a (7-January-2003) by the Serial ATA Workgroup.

[4] Based on specifications in Information Technology - Serial Attached SCSI (SAS), Working Draft American National Standard by Technical Committee T10, Revision 5 (9-July-2003).

[5] Based on specifications in PCI-Express specification by the PCI Sig, Revision 1.1 (28-March-2005).

[6] Based on Virtex 4 Data Sheet: DC and Switching Characteristics, by Xilinx, DS302 V 1.12 (22-March-2006).