Via Tuning

Via tuning is the design process of optimizing the geometry of a printed circuit board via (plated hole that connects routing on one layer to another) to minimize the impedance discontinuity that the via presents in the transmission channel path.  A printed circuit board trace can be controlled in impedance by using microstrip or stripline routing structures, but the vias that connect between layers cause discontinuities, usually due to excess capacitance from the typical 50 Ohm trace structure.  The excess capacitance results in a drop in impedance and will cause some of the signal to reflect if the rise time of the signal is comparable to the delay of the via element.  I have done some work attempting to tune a via using the Ansoft HFSS 3D field solver with limited success.  These tools are complicated to use and very difficult to get absolute correlation with measurement.  It definitely takes some finely honed skills to get good results.  There was a series of posts on the SI Mailing list last year discussing some of the important aspects of via tuning in more detail (Re: Looking for good source of information regarding Via tuning).